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uac 3553b universal serial bus (usb) dac edition may 21, 2003 6251-595-1ds data sheet mic r onas m i c r o n a s
uac 3553b data sheet 2 may 21, 2003; 6251-595-1ds micronas contents page section title 4 1. introduction 4 1.1. features 6 2. hardware description 7 2.1. general information 7 2.2. universal serial bus (usb) 7 2.2.1. transceiver 7 2.2.2. usb-interface 7 2.2.3. microcontroller 72.3.gpio 7 2.4. general purpose timer 8 2.5. audio streaming interface 8 2.6. audio control interface 8 2.7. the i 2 s - interface 8 2.7.1. asynchronous i 2 s input 8 2.7.2. synchronous i 2 s input mode 9 2.8. power supply 92.9.i 2 c bus interface 9 2.9.1. i 2 c master 9 2.9.2. i 2 c slave 10 2.10. analog output 10 2.10.1. digital-to-analog converters 10 2.10.2. analog filter 10 2.10.3. analog volume 10 2.10.4. line-out/headphone amplifier 11 2.11. special i/o 11 2.11.1. sof (start of frame) 11 2.11.2. sen (suspend enable) 11 2.11.3. suspend 11 2.11.4. reset 11 2.12. clock system 12 3. audio processing 13 3.1. automatic gain control 13 3.2. quasi-peak 13 3.3. bass control 13 3.4. treble control 14 3.5. parametric equalizer 14 3.6. volume, mute, and balance control 14 3.7. micronas dynamic bass (mdb) 15 3.7.1. dynamic amplification 15 3.7.2. adding harmonics
contents, continued page section title data sheet uac 3553b micronas may 21, 2003; 6251-595-1ds 3 16 4. firmware 16 4.1. features 16 4.1.1. device descriptor 16 4.1.2. configuration descriptor 17 4.1.3. audio class requests 18 4.2. vendor-specific requests 18 4.2.1. bootloader 19 5. specifications 19 5.1. outline dimensions 20 5.2. pin connections and short descriptions 22 5.3. pin descriptions 22 5.3.1. power supply pins 22 5.3.2. analog audio pins 23 5.3.3. interface pins 23 5.3.4. other pins 24 5.4. pin configuration 25 5.5. pin circuits 27 5.6. electrical characteristics 27 5.6.1. absolute maximum ratings 28 5.6.2. recommended operating conditions 30 5.6.3. characteristics 34 5.6.4. i 2 s interface timing characteristics 36 6. uac 3553b applications 36 6.1. recommended low-pass filters for analog outputs 36 6.2. external clocking via xti 37 6.3. typical applications 38 7. data sheet history
uac 3553b data sheet 4 may 21, 2003; 6251-595-1ds micronas universal serial bus (usb) dac 1. introduction the uac 3553b is a fully integrated 2-channel audio digital-to-analog converter (dac) with an integrated usb 2.0 full-speed interface controller. the device offers audio processing such as volume, bass, and treble. furthermore, the uac 3553b inte- grates a programmable 5-band parametric equalizer for correcting the frequency response of the applied speakers. integrated headphone amplifiers allow direct headphone connection. the dac is driven by digital audio input via usb audio class compliant isochronous stream 16 or 24 bits wide or via i 2 s input 16 or 32 bits wide. both audio input data can be fully mixed to the dac output. the integrated high-quality dsp-based adap- tive sample rate converter accepts usb audio streams in a wide range from 6.4 to 48 khz. general-purpose inputs and outputs connect the uac 3553b to peripheral hardware such as buttons, keyboards, leds, etc. usb hid device class for audio controls is supported. via an i 2 c master, more com- plex peripherals like lcd displays can be controlled; and the uac 3553b itself can be remote-controlled via i 2 c slave operation. this allows communication pipe- lining between a peripheral i 2 c system controller and the usb host. all in all, the ic is designed as the ideal connecting matrix between usb, digital audio input, home stereo, and all kinds of human interface devices. many func- tions are adjustable to the customer?s needs. more- over, firmware customization and plug-in download functionality to the on-chip microcontroller turns the uac 3553b into a customer-specific ic. micronas sup- plies a standard rom firmware based on the usb composite class, audio class, and hid class. 1.1. features ? single-chip, usb specification 2.0 compliant, stereo audio d/a converter ? supports up to 24-bit playback ? optional vendor identification and device configu- ration with external eeprom ? bus-powered and self-powered mode possible ? remote wake-up ? 8 general-purpose i/o pins with hid support ?i 2 s input interface ? independent adaptive sample rates of 6.4 to 48 khz for usb playback ? audio baseband control: bass, treble, loudness, vol- ume, balance, and mute ? dynamic bass management micronas dynamic bass (mdb) ? digital speaker equalizer (5-band parametric equalizer) ? thd better than ? 6 > 2 table 1?1: members of the uac 355xb family version description uac 3553b usb dac uac 3554b usb headset uac 3555b usb codec uac 3556b usb codec ? emulator version with additional 8k ram for program download.
data sheet uac 3553b micronas may 21, 2003; 6251-595-1ds 5 fig. 1?1: block diagram of the uac 3553b fig. 1?2: system application diagram d+ d ? dac usb controlling audio volume and headphone amplifier hid i 2 c i 2 s volume and headphone amplifier rom ram processing and gpio unit (apu) uac 3553b active stereo speakers headphone stereo equipment usb
uac 3553b data sheet 6 may 21, 2003; 6251-595-1dsds micronas 2. hardware description fig. 2?1: detailed block diagram of the uac 3553b gpi/o control i/o transceiver audio processing unit (apu) dac analog volume headphone amplifier oscillator analog filter gpio0 gpio1 gpio2 gpio3 gpio4 gpio5 gpio6 gpio7 d ? + supply vdd vss areg0 areg1 avss0/1 sgnd sref test trdy res suspend sen i 2 s dai cli i 2 c scl sda wsi voltage reg. + pll reference volt. reg. usb interface audio streaming interface audio control interface micro- controller sof vbus avdd
data sheet uac 3553b micronas may 21, 2003; 6251-595-1dsds 7 2.1. general information this description summarizes all hardware platform capabilities of the uac 3553b. the functionality for a certain application, however, is defined in the micro- controller?s firmware. this is explained in section 4. ?firmware? on page 16. the basic functionality (playback, audio control, hid) of the uac 3553b can entirely be used by any usb operating system without additional drivers. however, the ic offers far more functionality if vendor- specific controlling or download code is used. with external i 2 c controlling, the ic can even work as an audio dac in a non-usb environment. the use of this complete functionality is not described in the standard data sheet and can be found in separate application notes (www.micronas.com). a detailed block diagram of the uac 3553b is depicted in fig. 2?1. the functionality of the blocks is explained in the following sections. 2.2. universal serial bus (usb) 2.2.1. transceiver the differential input transceiver is used to handle the usb data signal according to the full-speed (12 mb/s) usb driver characteristics (usb spec 2.0). this block is supplied by an internal voltage regulator. the inter- nal pull-up resistor on the d+ line, indicating that the uac 3553b is connected to the usb bus, can be switched on and off by firmware. 2.2.2. usb-interface the usb interface does all the low level usb protocol handling, like nrzi coding, bit stuffing and crc com- putation. a receiver/transceiver logic handles the data traffic between the usb bus and the microcontroller memory. 2.2.3. microcontroller the microcontroller is an 8-bit risc controller which handles the usb chapter-9 processing and the decoding of class- and vendor-specific usb requests. detailed information is available in a separate docu- ment. the basic configuration is ?2kb ram ?12kb rom a part of the ram is reserved for download plug-ins. this allows the addition of smaller portions of code to the basic firmware for extended functionality or serves as a patch area. one example is adding extra func- tions to the gpio pins, like control of external compo- nents via usb. downloading of the plug-in can be done either from the usb host with an extra driver or from an external i 2 c eeprom. 2.3. gpio the pins gpio0?gpio7 can be switched into differ- ent electrical states: ? input, output or tristate ? weak or strong driver strength ? internal pull-down on or off 2.4. general purpose timer the uac 3553b incorporates a timer. it is a 16-bit counter with clock prescaler. the clock is running at 12 mhz. the prescaler can be set to divide by 1?256. the current value of the counter can always be read back. the timer initiates interrupts on reaching the count value maxa. the structure of the timer is shown in fig. 2?2. timer frequency: fig. 2?2: timer structure t clk 12 mhz prescale ----------------------- = prescaler 12 mhz counter max a max b control timer interrupt tc l k
uac 3553b data sheet 8 may 21, 2003; 6251-595-1dsds micronas 2.5. audio streaming interface the audio streaming interface directly connects the usb interface to the apu in order to transmit the digi- tal audio data for playback.the following data formats are supported: 2.6. audio control interface the audio control interface links the microcontroller to the apu and is used to initialize the apu and to trans- mit audio-related usb control data, like volume set- ting, tone control, etc. the audio control interface supports full access to all apu registers via the microcontroller. 2.7. the i 2 s - interface used pins: dai, wsi, cli the i 2 s interfaces operate in 16-bit or 32-bit mode. delayed word strobe or standard i 2 s format can be selected via the programmable delay bit. word strobe polarity is programmable, also. 2.7.1. asynchronous i 2 s input used pins: dai, wsi, cli in this mode the uac 3553b is slave, i.e., asynchro- nous input is possible at a sampling rate range from 6.4 khz to 48 khz. the external i 2 s source provides dai, wsi, and cli fig. 2?3: asynchronous i 2 s input 2.7.2. synchronous i 2 s input mode used pins: dao, dai, wsi, cli in this mode external digital sources use cli and wsi as reference and generate synchronous input data on dai. fig. 2?4: synchronous i 2 s input table 2?1: audio formats playback 16-bit mono 16-bit stereo 24-bit stereo dai cli wsi asynchronous input uac 3553b dai cli wsi uac 3553b synchronous input
data sheet uac 3553b micronas may 21, 2003; 6251-595-1dsds 9 2.8. power supply the uac 3553b has on-chip voltage regulators pro- viding the optimal supply voltages for the analog and digital sections, thus allowing to power the ic by the usb bus supply lines, as well, as from external supply. they also serve to reduce cross-talk and emi. for stable operation, all regulators need external capacitors. the regulators are 1. vreg: 3.4-v regulator for usb-signaling (saving external regulator) 2. areg0: 3.5-v regulator for analog back-end 3. areg1: 3.5-v regulator for analog circuitry apart from back- end. reference voltage for analog signals: sref: 1.7-v (optional 2.3 v) reference voltage for analog cir- cuitry. note: it is recommended that avss0/1, sgnd and vss are connected. in certain applications, however, it may be better to split signal ground from the other grounds in order to reduce noise. 5-v mode if a higher output level is required, the ic can operate in 5-v modus. in this case, the ic is powered from an external 5-v supply: avdd has to be connected to areg0 and areg1 and sref must be switched to 5-v mode. 2.9. i 2 c bus interface pins: sda, scl the uac 3553b is equipped with an i 2 cbus master/ slave interface. the bus format and timing follows the original specification for i 2 c (the i 2 c specification- v2.1). it operates with 5-v signalling at 100 khz or 400 khz. both master and slave mode require support from the microcontroller firmware. 2.9.1. i 2 c master this mode allows control of external i 2 c devices, like eeproms, lcd-displays etc. this interface is used to download configuration data and firmware from an eeprom after power-up. the bus protocol (subad- dressing and packet length) is defined by firmware and therefore programmable. note: micronas standard firmware (section 4. ?firm- ware? on page 16) provides support for usb-to-i 2 c bridging, allowing control of i 2 c- devices via usb. 2.9.2. i 2 c slave in i 2 c slave mode, the interface provides an interrupt to the microcontroller after detecting the assigned i 2 c address (0x48). the corresponding interrupt service routine handles this request and interprets incoming data according to the application. one example of handling could provide full access to all memory locations.
uac 3553b data sheet 10 may 21, 2003; 6251-595-1dsds micronas 2.10. analog output pins: outl, outr, fopl, fopr, foutl, foutr, finl, finr the analog output system comprises the stereo audio dac, analog filters, op amps for external out-of-band- noise filters, analog volume, mute, and the output amplifiers. 2.10.1. digital-to-analog converters the uac 3553b uses two multi-bit sigma delta dacs with high linearity and snr better than 95 dba. 2.10.2. analog filter pins: fopl, fopr, foutl, foutr, finl, finr this block contains the op-amps for the optional ana- log external out-of-band-noise filters. it is recom- mended to use a second-order filter for the main chan- nels (outl, outr) (see section 6. ?uac 3553b applications? on page 36). it is possible to omit this fil- ters and to save the external components. in this case, the op-amp has to be switched off and the pins footl/r, finl/r and fopl/r must be connected. the output signal will contain more out-of-band noise, which is not audible, however. 2.10.3. analog volume the analog volume covers a range from +6 db to -18 db with 1.5 db step size. but this is the analog component of the overall volume system which covers a range from +12 db to ? 11 1 note: positive volumes will degrade the thd at high input levels. 2.10.4.line-out/headphone amplifier pins: outl, outr stereo mode the line-out/headphone amplifier output is provided at the outl and outr pins connected either to stereo headphones or to a power amplifier. the stereo head- phones require external serial resistors in both chan- nels. see section 6. ?uac 3553b applications? on page 36. fig. 2?5: loudspeaker connection for stereo mode mono mode in mono mode, the dc coupling capacitors and further filter circuitry are not required. in this mode, the output pins outl/r operate in bridge mode with complemen- tary signals. therefore, the maximum output power increases allowing small speakers to be driven directly. fig. 2?6: loudspeaker connection for mono mode outl avss outr avss outr outl
data sheet uac 3553b micronas may 21, 2003; 6251-595-1dsds 11 2.11.special i/o pins: sof, sen, suspend, reset the following sections describe some pins with special functionality. 2.11.1.sof (start of frame) the sof pin provides a 1-ms periodic signal which is derived from the usb frame rate. it can be used for test purpose or as an usb-synchronous reference for vendor-specific external circuitry. 2.11.2.sen (suspend enable) pin: sen this is a digital input that prevents the device from entering the low-power mode (suspend). the uac 3553b enters a low power mode if: ? j-state on d+, d ? , 2.11.3.suspend pin: suspend the suspend pin is a digital output pin which indi- cates the low-power mode. it can be used to power down external circuitry, like power amplifiers in an usb speaker. 2.11.4.reset pin: res the res pin resets the uac 3553b. during power up the res pin should be low until the clock system is up and running. then this pin can be released and the uac 3553b enters normal operating mode. note: in low-power mode, the res pin must not be low to avoid restart of the clock system and therefore entering normal power mode. fig. 2?7: timing diagram of the reset procedure 2.12.clock system pins: xti, xto the uac 3553b requires a 12-mhz clock source, which is realized as an on-chip oscillator with external crystal. also an external oscillator can be used. in this case, the clock has to be connected to xti (see also section 6.2. ?external clocking via xti? on page 36). the 12 mhz is the input clock for a pll circuit which generates all clocks needed within the ic. the clock for the apu is programmable either to 48 mhz or 72 mhz. in case of 48 khz, the uac 3553b consumes less power, but on the other hand a reduced feature set for the audio processing has to be taken into account (see fig. 3?1 on page 12). table 2?2: sen pin sen high suspend enabled low suspend disabled/remote wake-up table 2?3: suspend pin suspend high normal power low low power 20 ms 90% avdd res vdd
u a c 3 5 5 3 b d a t a s h e e t 12 may 21, 2003; 6251-595-1ds micronas 3. audio processing fig. 3?1: signal flow in the audio processing unit (apu) usb mix i 2 s mix usb i 2 s agc bass/ treble/ eq comple- mentary high low mdb loud- ness vol. balance q-peak (downstream) d a pass pass d a l l r r mono/ stereo + right invert dashed blocks not available in reduced feature set
data sheet uac 3553b micronas may 21, 2003 ; 6251-595-1 ds 13 the audio processing is realized by apu firmware. the audio building blocks can be split into usb-inde- pendent features such as parametric equalizer, i 2 s i/o, and blocks which belong to usb feature units, mixer units, and selection units defined in the usb device class definition for audio devices. the usb feature unit provides basic manipulation of the incoming logical channels and can be controlled by the standard os-provided mixer tool. the parameters for the usb-independent features are predefined in the internal rom, in an external eeprom or a special host application which drives the ic. the uac 3553b supports two logical channels (i.e. left and right). multichannel or surround systems, how- ever, can also be realized using more than one uac 3553b, because phase or delay distortion is elim- inated in the device by locking the audio processing to the usb frame rate. an overview of the architecture is given in fig. 3?1 on page 12. if the apu works with a 48 mhz clock it is necessary to select the reduced feature mode. the blocks, which are not available in reduced feature mode are shown with dashed lines in fig. 3?1 on page 12. 3.1. automatic gain control the automatic gain control (agc) is one of the build- ing blocks of the feature unit (usb device class defi- nition for audio devices 1.0, page 39). different sound sources fairly often do not have the same volume level. the automatic gain control solves this problem by equalizing the volume levels within a defined range. below a threshold level the signals are not affected. the level-adjustment is performed with time constants in order to avoid short-time adjustments due to signal peaks. fig. 3?2: simplified agc characteristics 3.2. quasi-peak a quasi-peak detector is provided in the dac channel. this can be used e.g. for a vu-meter on the host side. the feature is based on using fast attack and slow decay time constants. 3.3. bass control the bass control provides gain or attenuation to fre- quency components below a corner frequency of 120 hz. the bass control works identically on both channels in a range of ? 12 +12 3.4. treble control the treble control provides gain or attenuation to fre- quency components above a corner frequency of 6 khz. the treble control works identically on both channels in a range of ? 12 +12 table 3?1: agc parameters parameter settings default decay time 8 sec 4sec 2sec 20 ms 4sec ? ? 2 ? 1 ? 12 ? 6 + 6 ? 1 ? 21 ?
uac 3553b data sheet 14 may 21, 2003; 6251-595-1ds micronas 3.5. parametric equalizer the parametric equalizer is an audio feature which is not accessed via standard usb controls. it allows the compensation of the frequency response of a speaker. alternatively, frequency responses can be set to suit individual tastes. the equalizer consists of five individ- ually adjustable bands. the control parameters and the parameter range for each band is shown in table 3?2. the adjustment of the equalizer is supported by an application program that allows to set up frequency responses and to download the corresponding filter coefficients into the uac 3553b. when the frequency response matches the requirements, it can be pro- grammed into the external eeprom or can be set by a vendor specific device driver. the uac 3553b is shipped with a flat frequency response. 3.6. volume, mute, and balance control the volume control is partly realized in the analog back-end. this preserves high audio quality (snr) at low volume settings because signal and noise are attenuated in the same way. this is a significant advantage over digital-only implemenations since it preserves the native audio bit resolution in the pro- cessing path. the uac 3553b uses digital volume control only for the fine stepping. the volume setting is smoothed by an internal ramping algorithm in order to avoid audible clicks during volume change. the split- ting between analog and digital volume is handled by the uac 3553b automatically. the balance is implemented digitally by attenuating one channel. the mute control is part of the volume system in the uac 3553b. it functions simultaneously on both chan- nels and can be switched on and off under usb con- trol. similar to the volume control, clicks are avoided by a ramping algorithm. 3.7. micronas dynamic bass (mdb) the m icronas d ynamic b ass algorithm (mdb) imple- ments a sophisticated bass boost system, which extends the frequency range of loudspeakers or head- phones. the mdb is placed in the crossover filter path. the enhanced bass signal can be added back onto the left/right channels. micronas dynamic bass combines two effects: dynamic amplification and adding harmon- ics. several parameters allow tuning the characteristics of mdb according to the loudspeaker, the cabinet, and personal preferences. for more detailed information on how to set up mdb, micronas provides an appropri- ate application note. table 3?2: equalizer parameters parameter min max center frequency 50 hz 15 khz gain/attenuation ? 6 +6 table 3?3: mdb parameters parameter range default if disabled default if enabled effect strength off?max off medium harmonic content 0?100% 0% 50% center fre- quency 20?300 hz 90 hz 90 hz amplitude limit ? 2 = =
data sheet uac 3553b micronas may 21, 2003; 6251-595-1ds 15 3.7.1. dynamic amplification since the human impression of loudness depends on the frequency, a dynamic compression of the low fre- quencies adapts the sound to the human perception. in order to prevent clipping and to adapt the system to the signal amplitude which is really present at the out- put of the device, the mdb contains a definable limit. the output signal amplitude is monitored and if it comes close to the limit, the gain is reduced automati- cally. clipping effects are avoided. fig. 3?3: dynamic amplification 3.7.2. adding harmonics mdb exploits the psychoacoustic phenomenon of the ?missing fundamental?. adding harmonics of the fre- quency components below the cutoff frequency gives the impression of actually hearing the low frequency fundamental. in other words: although the loud- speaker system is not capable of generating such low frequencies, the listener has the impression that it reproduces them. fig. 3?4: adding harmonics frequency mdb_limit mdb_cf signal level amplitude subw_freq (db) frequency mdb_cf amplitude (db)
uac 3553b data sheet 16 may 21, 2003; 6251-595-1ds micronas 4. firmware it was the purpose of the previous chapters to describe the uac 3553b from the hardware point of view. the complete functionality, however, is defined by the microcontroller firmware. this firmware tailors the device to a specific application. micronas offers a stan- dard dac firmware versions which is embedded in the rom. note: by means of an external eeprom it is possible to customize many parameters (ids, strings, equalizer setting etc.). 4.1. features the main features of the standard firmware versions are ? usb playback withsample rates from 6.4 khz to 48 khz ? audio baseband processing incl. dynamic bass management ? basic audio control by gpio-hid ? suspend mode and remote wake-up support ? i2c master/slave support ? bootloader allows download of configuration data, plug-ins after power-on ? plug-in support (downloadable firmware extensions from external eeprom or win driver) most of the functionality is defined in the device and configuration descriptor. the following chapters pro- vide all noteworthy information, which is buried in this descriptors. it is assumed that the reader is familiar with the basic usb notation (usb spec 1.1 etc.). 4.1.1. device descriptor the device descriptor contains the downloadable ids and the index for the strings. associated to the string index there are three program- mable strings. the rom firmware defines only two: 4.1.2. configuration descriptor first the configuration descriptor contains information on the bus/self-powered and remote wake-up capabili- ties. the uac 3553b allows all combinations of these features. there is also a string index, allowing to asso- ciate a string to this configuration. the default string is the date code (time of code assembly). these items are programmable. table 4?1: programmable device descriptor items item default - uac 3553b idvendor 0x074d idproduct 0x3553 bcddevice 0x000x 1) imanufacturer 0x01 iproduct 0x02 iserialnumber 0x00 1) changes with new firmware revisions table 4?2: strings used in dac firmware string default - uac3553b manufacturer string micronas product string uac3553b usb-dac table 4?3: programmable configuration descriptor items item default - uac3553b iconfig 0x01 bmattributes 0xc0 (self-powered, remote wake-up maxpower 0x00 (0ma)
data sheet uac 3553b micronas may 21, 2003; 6251-595-1ds 17 then the configuration descriptor provides all informa- tion concerning the audio flow in the class specific audio control interface. fig. 4?1 shows the graphical representation for the dac firmware. this are the audio structure how it appears to the usb host. without any additional drivers the windows os provides sliders in the mixing tool to control volume, bass, treble setting. using a vendor-specific applica- tion, however, it is possible to extend this to the full sig- nal routing capabilities (see section 3. on page 12). can be achieved by plug-ins from external eeprom or windows driver. note: bassboost enables a dynamic bass manage- ment algorithm with programmable (ext. eeprom) characteristics. the next part of the configuration descriptor defines the audio format for playback. this is not programma- ble. the uac 3553b accepts all sample rates from 6.4 khz to 48 khz the final portion of the configuration descriptor defines the hid functions: the dac firmware uses the gpio pins to connect keys which are related to the usb hid class. the standard configuration defines the gpio0...gpio7 as input pins for the audio and media control shown in table 4?5. the keys are polled every 1 ms by the microcontroller and the corresponding key codes are transmitted to the host on request when a key enters high state. the hosts polling rate is 8 ms. this parameter, however, is part of the configuration set, which can be downloaded from an external i 2 4.1.3. audio class requests the dac firmware supports all audio class requests which are required by the audio flow shown in fig. 3? 1. the min/max/res setting follows the limits which are defined in the audio processing apart from the main volume setting (fu1). in this case, the overall range from ? 11 +6 ? + fig. 4?1: standard dac audio flow table 4?4: supported audio formats playback format 16-bit mono 16-bit stereo 24-bit stereo table 4?5: standard key configuration pin function gpio0 volume up gpio1 volume down gpio2 mute on-off toggle gpio3 bassboost on-off toggle gpio4 next track gpio5 previous track gpio6 stop gpio7 playback it ep1 usb id12 fu volume,mute, bass,treble bassboost agc id1 ot id14 d/a playback
uac 3553b data sheet 18 may 21, 2003; 6251-595-1ds micronas 4.2. vendor-specific requests these requests provide functionality which extents standard controlling of the operating system. micronas provides a driver for windows operating systems which supports: ? set mem this request allows to write all ram and register locations in the chip. ?get mem this request allows to read all memory locations in the chip. block read is supported ?set i 2 c this vendor request allows to drive the i 2 c-master in the dac firmware. it allows to write to external i 2 c devices ?get i 2 c this request supports i 2 c master reading from external devices 4.2.1. bootloader the bootloader is a part of the firmware which allows communication with an external i 2 c eeprom. in multi-master applications with i 2 c control, however, it is not allowed to have i 2 c traffic coming from uac 3553b and therefore, the bootloader needs to be enabled by gpio7: the bootloader runs immediately after power-on. at this time the device is not connected to the usb bus. when the bootloader has finished, the pull-up resistor is switched on the d+ line to signal the host that the device is ready for ennumeration. if no external eeprom is found, the uac 3553b continues with the default configuration. two i 2 c-eeprom types with dif- ferent i 2 c-device ids and number of subaddresses are supported and can be selected by gpio6. the eeprom type and size must be choosen according to the content. the size of the eeprom must be chosen according to the content. details on the eeprom content and the structure of the different sections can be found in separate applica- tion notes. note: using gpio6/7 as bootloader option bits may cause conflicts with the use of this pins as hid media control pins. in this case, a plug-in or a hardware workaround is available table 4?6: bootloader enable setting bootloader gpio7 = 0 disabled gpio7 = 1 enabled table 4?7: supported i 2 c eeprom types gpio6 device id sub- addresses size purpose 1 0x51 1 byte <2 kbit configuration (and very small plug- ins) 0 0x50 2 bytes >2 kbit configuration and plug-ins
data sheet uac 3553b micronas may 21, 2003; 6251-595-1ds 19 5. specifications 5.1. outline dimensions fig. 5?1: pmqfp44-1: p lastic m etric q uad f lat p ackage, 44 leads, 10 1 2
uac 3553b data sheet 20 may 21, 2003; 6251-595-1ds micronas 5.2. pin connections and short descriptions nc = not connected, leave vacant lv = if not used, leave vacant vss = if not used, connect to vss obl = obligatory; connect as described in circuit diagram vdd = connect to vdd pin no. pin name type connection (if not used) short description 1 xti in obl quartz oscillator pin 1 2 xto out obl quartz oscillator pin 2 3 areg1 out obl regulator output for analog parts except amplifiers 4 avss1/avss0 in obl vss for analog parts 5 outl out lv audio output: headphone left / speaker left 6 outr out lv audio output: headphone right /speaker right 7 areg0 out obl regulator output for audio output amplifiers 8 avdd in obl analog vdd 9 dai in vss i 2 s data input 10 wsi in/out vss i 2 s word strobe 11 cli in/out vss i 2 s bit clock 12 gpio 7 in/out lv hid io 7 13 gpio 6 in/out lv hid io 6 14 gpio 5 in/out lv hid io 5 15 gpio 4 in/out lv hid io 4 16 gpio 3 in/out lv hid io 3 17 gpio 2 in/out lv hid io 2 18 gpio 1 in/out lv hid io 1 19 gpio 0 in/out lv hid io 0 20 sda in/out lv i 2 c data 21 scl in/out lv i 2 c clock 22 trdy out lv test output pin 23 vbus in obl sense usb bus 24 vreg out obl capacitor for internal supply 25 dminus in/out obl usb data minus 26 dplus in/out obl usb data plus 27 vss in obl digital vss 28 vdd in obl digital vdd
data sheet uac 3553b micronas may 21, 2003; 6251-595-1ds 21 29 test in vss test enable 30 res in vdd power on reset, active low 31 suspend out lv low-power mode indicator 32 sof out lv 1-ms start-of-frame signal 33 sen in vss suspend enable 34 foutl out obl output to left external filter 35 fopl in/out obl filter op amp inverting input, left 36 finl in/out obl input for filtoutl 37 foutr out obl output to right filter op amp 38 fopr in/out obl right filter op amp inverting input 39 finr in/out obl input for filtoutr 40 nc lv leave vacant 41 nc lv leave vacant 42 sgnd in obl signal reference ground 43 sref in obl signal reference voltage 44 nc lv leave vacant pin no. pin name type connection (if not used) short description
uac 3553b data sheet 22 may 21, 2003; 6251-595-1ds micronas 5.3. pin descriptions 5.3.1. power supply pins the uac 3553b combines various analog and digital functions which may be used in different modes. for optimized performance, major parts have their own power supply pins. all vss power supply pins must be connected. vdd (28) vss (27) the vdd and vss power supply pair are connected internally with all digital parts of the uac 3553b. avdd (8) avdd is the supply pin for the voltage regulators at areg0(9) and areg1(4). avss0/1 (4) avss1 is the ground connection for the analog audio processing parts, including the headphone/loud- speaker amplifiers. sref (43) reference for analog audio signals. this pin is used as reference for the internal op amps. this pin must be blocked against sgnd with a 3.3- note: the pin has a typical dc level of 1.725 v. it can be used as reference input for external op amps when no current load is applied. sgnd (42) reference ground for the internal band-gap and bias- ing circuits. this pin should be connected to a clean ground potential! any external distortions on this pin will affect the analog performance of the uac 3553b. areg0 (7) voltage regulator output for headphone/loudspeaker amplifiers supply. connect an external ceramic capaci- tor to stabilize the regulator output. areg1 (3) voltage regulator output for analog audio processing parts supply, except the headphone/loudspeaker amplifiers. connect an external ceramic capacitor to stabilize the regulator output. 5.3.2. analog audio pins foutl (34) fopl (35) finl (36) foutr (37) fopr (38) finr (39) filter op amps are provided in the analog baseband signal paths. these inverting op amps are freely accessible for external use by these pins. the foutl/r pins are connected with the buffered output of the internal switch matrix. the fopl/r pins are directly connected with the inputs of the inverting filter op amps. the finl/r pins are connected to the outputs of the op amps. outl (5) outr (6) these pins are connected to the internal output ampli- fiers. outl/r can be used for either line-out or stereo headphones. caution: a short-circuit at these pins for more than a momentary period may result in destruction of the internal circuits.
data sheet uac 3553b micronas may 21, 2003; 6251-595-1ds 23 5.3.3. interface pins dminus (25) dplus (26) differential usb port pins. the dplus pin has an internal switchable pull-up resistor. both pins must be connected to the usb bus via a series resistor. vbus (23) sense usb bus. cli (11) clock line for the i 2 s bus. this line is driven by the uac 3553b; in slave mode, an external i 2 s clock has to be supplied. dai (9) input of digital serial sound data to the uac 3553b via i 2 s bus. wsi (10) word strobe line for the i 2 s bus. in master mode, this line is driven by the uac 3553b; in slave mode, an external i 2 s word strobe has to be supplied. sda (20) via this pin, the i 2 c bus data is written to or read from the uac 3553b. scl(21) via this pin, the i 2 c bus clock signal has to be sup- plied. 5.3.4. other pins xti (1) xto (2) the xti pin is connected to the input of the internal crystal oscillator; the xto pin to its output. both pins should be directly connected to the crystal and two ground-connected capacitors (see application dia- gram). note: do not drive external clock circuits via xti/xto. sen (33) digital input that prevents the device from entering the low-power mode. this pin is also used to signal remote wake-up. test (29) test enable. this pin is for test purposes only and must always be connected to vss. vreg (24) voltage regulator output for usb transceiver supply. connect an external ceramic capacitor to stabilize the regulator output. res (30) a low signal at this pin resets the chip. gpio 0 ? 7 (19, 18, 17, 16, 15, 14, 13, 12) these pins are configurable to be either input or output and can be used to connect audio function keys or sig- nalling leds. suspend (31) this pin indicates that the host pc sets the usb bus to the suspend mode state. sof(32) start of frame signal. 1-ms signal that can be used for external application circuits. trdy (22) test output pin. this pin is intended for test purposes only and must not be connected.
uac 3553b data sheet 24 may 21, 2003; 6251-595-1ds micronas 5.4. pin configuration fig. 5?2: pmqfp44-1 package 34 35 36 37 38 39 40 41 42 43 44 22 21 20 19 18 17 16 15 14 13 12 1234567891011 33 32 31 30 29 28 27 26 25 24 23 uac 3553b sen sof suspend res test vbus vreg dminus dplus vss nc sref sgnd nc nc finr fopr foutr finl foutl fopl gpio 7 gpio 6 gpio 5 gpio 4 gpio 3 gpio 2 gpio 1 gpio 0 sda trdy scl xti xto areg1 avs s1/av ss0 outl cli wsi dai av dd areg0 outr vdd
data sheet uac 3553b micronas may 21, 2003; 6251-595-1ds 25 5.5. pin circuits fig. 5?3: pins finr, fopr, finl, fopl fig. 5?4: pins sref, sgnd fig. 5?5: output pins foutl, foutr fig. 5?6: clock oscillator xti, xto fig. 5?7: input pins res , test, sen, dai fig. 5?8: output pins outl, outr fig. 5?9: digital output pins sof, suspend , trdy fig. 5?10: digital input/output pins dminus, dplus, vreg sref fopn finn foutn ext. filter network 115 k ? 1 1 1 ?
uac 3553b data sheet 26 may 21, 2003; 6251-595-1ds micronas fig. 5?11: input/output pins gpio0...gpio7, wsi, cli fig. 5?12: input pin vbus fig. 5?13: input/output pins sda, scl fig. 5?14: analog voltage supply pins avdd, avss, areg0/1 fig. 5?15: digital voltage supply pins vdd, vss, vreg dv sup p n gnd n gnd areg0/1 ? 1 + ? +
data sheet uac 3553b micronas may 21, 2003; 6251-595-1ds 27 5.6. electrical characteristics 5.6.1. absolute maximum ratings stresses beyond those listed in the ?absolute maximum ratings? may cause permanent damage to the device. this is a stress rating only. functional operation of the device at these or any other conditions beyond those indicated in the ?recommended operating conditions/characteristics? of this specification is not implied. exposure to absolute maximum ratings conditions for extended periods may affect device reliability. symbol parameter pin name min. max. unit t a ambient operating temperature 0 70 11 ? 12 ? 6 1 ? 6 2 , 1 ? 6 ? 6 ? , 1, ? + , ? + , ? 2 +2 , ? + , ? 1 + , ? + , ? 2 2 , ? +2 1 , 1 ? +2 1 2 , 1 not short-circuit proof! 4) positive value means current flowing into the circuit
uac 3553b data sheet 28 may 21, 2003; 6251-595-1ds micronas 5.6.2. recommended operating conditions symbol parameter pin name min. typ. max. unit temperature ranges and supply voltages t a ambient temperature range 0 70 1 6 22 1 6 1 22 analog reference c sref1 analog reference capacitor sref 1 3.3 2 1 analog audio filter inputs and outputs z aflo analog filter load output 1) foutl/r 7.5 6 k ? 1 ? analog audio outputs z aol_hp output load headphone (16- ? 16 2 1 ? 1 6 6
data sheet uac 3553b micronas may 21, 2003; 6251-595-1ds 29 crystal characteristics 1) t ac ambient temperature range 0 70 = 22 2 12 , ? 1 ? ? ? ? 12 ? voltage regulator c vreg voltage regulator capacitor (ceramic, x5r) vreg 330 1000 nf c areg0 voltage regulator capacitor (ceramic, x5r) areg0 330 470 600 nf c areg1 voltage regulator capacitor (ceramic, x5r) areg1 150 220 270 nf transceiver r usb input series resistance dplus/ dminus 24 ( ? 1 2 22 + ? 1 6 symbol parameter pin name min. typ. max. unit
uac 3553b data sheet 30 may 21, 2003; 6251-595-1ds micronas 5.6.3. characteristics at t a = 0 to 70 , = 1 6 , = 1 6 =2 , = = , = 12 , = , , m icronas d ynamic b ass: off, agc: off, equalizer: off (positive current flowing into the ic), 3-v mode, reduced feature set, if not otherwise specified. symbol parameter pin name min. typ. max. unit test conditions digital supply i vdd current consumption 1) vdd 57 45 70 ma 72 mhz apu clock 48 mhz apu clock 30 80 digital input pin i i input leakage current gpio[7:0], sen, res , vbus, dai, wsi, cli 1 ? digital output pin v oh output high voltage gpio[7:0] s uspend , sof, wsi, cli, sda, scl v supd ? = 1 2 analog supply i avdd current consumption analog audio avdd 12 15 ma all analog blocks on, mute 120 135 2 2 ? 16 ? = , 1 , 1 1 1 1 1 2 2 1 please consider power limitations due to usb specification.
data sheet uac 3553b micronas may 21, 2003; 6251-595-1ds 31 analog supply voltage regulators v areg output voltage areg0/1, avss0/1 3.3 3.5 3.7 v reference frequency generation v dcxti dc voltage at oscillator pins xti/o 0.5* v areg1 v c li input capacitance at oscillator pin xti 3 pf c lo input capacitance at oscillator pin xto 3 pf v xtalout voltage swing at oscillator pins (peak-peak) xti/o 0.6 * v areg1 1.0 * v areg1 v t osc_rise oscillator start-up time 10 ms after min. v supa is reached usb transceiver v reg regulator voltage vreg 3.25 3.4 3.55 v c l =1 2 ? + ? 2 ? , + ? 2 = , + ? 11 = , + ? 1 16 2 = , + ? 2 + ? 2 , + 1 ? symbol parameter pin name min. typ. max. unit test conditions
uac 3553b data sheet 32 may 21, 2003; 6251-595-1ds micronas analog audio v sref signal reference voltage sref 1.6 1.725 1.8 v r l >> 1 ?, 2 = 2 22 , 1 ? , = , 1 2 1 6 ? = , 1 1 1 , 1 1 1 1 1 2 2 1 1 16 2 ? ? = 2 22 , 1 ? , = , 1 ? 2 ? = 2 22 , , 2 ? , = , 1 ? 2 1 2 = 2 22 , , 1 ? , = , 1 ? 2 2 2 2 12 = 2 22 , , 1 ? , = ? , 1 ? 2 ? 11 = 2 22 , , = 1 = 2 ?, 16? , = , = 2 1 symbol parameter pin name min. typ. max. unit test conditions
data sheet uac 3553b micronas may 21, 2003; 6251-595-1ds 33 p hp output power in bridge mode (mono speaker/headphone) outl/r 180 mw eff r l = 16 ?, , = , = 2 ? 1 ? ? ? ? = 2 ?, , = , = ? 2 different characteristics in 5-v mode v sref signal reference voltage sref 2.25 2.3 2.35 v r l >> 1 ?, 2 = 2 22 , 1 ? , = , 1 ? 2 ? ? = 2 22 , 1 ? , = , 1 ? 2 1 2 = 2 22 , , 1 ? , = , 1 ? 2 2 2 2 1 = 2 22 , , 1 ? , = ? , 1 ? 2 1 = 2 ?, 16 ? , = , = 2 2 = 16 ?, , = , = 2 2 symbol parameter pin name min. typ. max. unit test conditions
uac 3553b data sheet 34 may 21, 2003; 6251-595-1ds micronas 5.6.4. i 2 s interface timing characteristics different characteristics for full feature set (see fig. 2?1 on page 6), 3-v mode snr ao1 signal-to-noise ratio 2) outl/r 88 95 db(a) bw = 20 hz...22 khz, a-weighted, r l 1 ? , = , 1 ? 2 2 2 2 1 = 2 22 , , 1 ? , = ? , 1 ? 2 2 symbol parameter pin name min. typ. max. unit test conditions symbol parameter pin name min. typ. max. unit test conditions t s_i2s i 2 s input setup time before rising edge of clock cli dai 10 ns t h_i2s i 2 s input hold time after rising edge of clock 40 ns t d_i2s i 2 s output delay time after falling edge of clock cli wsi 30 ns c l =30 pf t o_i2s i 2 s output setup time before rising edge of clock cli 4 ns c l =30 pf
data sheet uac 3553b micronas may 21, 2003; 6251-595-1ds 35 fig. 5?16: timing: asynchronous i 2 s input fig. 5?17: timing: synchronous i 2 s input detail c wsi as input 1/f cli =325.5 ns t s_i2s cli - input detail d wsi as output 1/f cli =325.5 ns t d_i2s cli - output r lsb l ls b 16/32 bit right channel l lsb r msb detail c philips format sony format wsi - input cli - input dai - input detail a philips format sony format r lsb l msb 16/32 bit left channel detail a dai - input t s_i2s cli - input t h_i2s detail b wsi as output 1/f cli =325.5 ns t s_i2s detail a dai - input t s_i2s t o_i2s t d_i2s cli - output cli - output detail c wsi as output 1/f cli =325.5 ns t d_i2s cli - output r lsb l lsb 16/32 bit right channel l lsb r msb detail b philips format sony format wsi - input cli - input dai - input detail a philips format sony format r lsb l msb 16/32 bit left channel 1/f i2sws detail c t h_i2s
uac 3553b data sheet 36 may 21, 2003; 6251-595-1ds micronas 6. uac 3553b applications 6.1. recommended low-pass filters for analog outputs fig. 6?1: 2 nd -order low-pass filter if the filter is not used, then foutl(r), fopl(r), and finl(r) are to be connected (dashed line) and the internal op-amp must be switched off. note: first or third-order low-pass is also possible, but then the frequency response degrades. 6.2. external clocking via xti ac-coupling of the clock signal the input level should be in the range of 0.5?2.5 v pp . for a load capacitance of 22 pf at xto. dc-coupling of the clock signal the dc input level must be 0.5 1 1 2 212 11 table 6?1: attenuation of 2 nd -order low-pass filter frequency gain 24 khz ? 1 ? 11 ? 22 11 ? 11 ? 1 ? finl(r) fopl(r) foutl(r) 2 nd -order avss1
d a t a s h e e t u a c 3 5 5 3 b m i c r o n a s m a y 2 1 , 2 0 0 3 ; 6 2 5 1 - 5 9 5 - 1 d s 3 7 6.3. typical applications fig. 6?2: circuit for a typical dac application 16

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uac 3553b

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all information and data contained in this data sheet are without any commitment, are not to be considered as an offer for conclusion of a contract, nor shall they be construed as to create any liability. any new issue of this data sheet invalidates previous issues. product availability and delivery are exclusively subject to our respective order confirmation form; the same applies to orders based on development samples deliv- ered. by this publication, micronas gmbh does not assume responsibil- ity for patent infringements or other rights of third parties which may result from its use. further, micronas gmbh reserves the right to revise this publication and to make changes to its content, at any time, without obligation to notify any person or entity of such revisions or changes. no part of this publication may be reproduced, photocopied, stored on a retrieval system, or transmitted without the express written consent of micronas gmbh. uac 3553b data sheet 38 may 21, 2003; 6251-595-1ds micronas micronas gmbh hans-bunte-strasse 19 d-79108 freiburg (germany) p.o. box 840 d-79008 freiburg (germany) tel. +49-761-517-0 fax +49-761-517-2174 e-mail: docservice@micronas.com internet: www.micronas.com printed in germany order no. 6251-595-1ds 7. data sheet history 1. final data sheet: ?uac 3553b universal serial bus (usb) dac?, edition may 21, 2003, 6251-595-1ds. first release of the final data sheet.

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